On-Chip Power Delivery and Management
暫譯: 晶片內電源供應與管理

本書描述了在高速、高複雜度的集成電路中分配功率的方法，這些電路的功率水平超過數十瓦，而電源電壓低於一伏特。它提供了對功率傳遞和管理系統及相關設計問題的廣泛且連貫的處理，包括電路網絡模型和片上去耦電容器的設計技術，並提供對片上功率分配系統行為和設計的深入見解和直覺。為了提供更直觀的閱讀流程，本書第四版將內容分為子領域，新增了超過一百頁的新內容，包括互指結構的電感模型、多層功率網格的設計策略、高效功率網格設計和分析的先進方法，以及同時放置片上多個電源和去耦電容器的方法論。這些新增材料的重點在於管理片上功率分配網絡的複雜性。

Eby G. Friedman was born in Jersey City, New Jersey in 1957. He received the B. S. degree from Lafayette College, Easton, Pennsylvania in 1979, and the M. S. and Ph. D. degrees from the University of California, Irvine, in 1981 and 1989, respectively, all in electrical engineering.
He was with Philips Gloeilampen Fabrieken, Eindhoven, The Netherlands, in 1978 where he worked on the design of bipolar differential amplifiers. From 1979 to 1983, he was employed by Hughes Aircraft Company, Newport Beach, California, working in the areas of custom IC design, software compatible gate array design, one- and two-dimensional device modeling, circuit modeling, and double level metal process development. From 1983 to 1991, he was employed at Hughes Aircraft Company, Carlsbad, California, rising to the position of Manager of the Signal Processing Design and Test Department, responsible for the design and test of high performance VLSI/VHSIC CMOS and BIMOS digital and analog IC's, the development of supporting design and test methodologies and CAD tools, functional and parametric test, and the development of high performance and high resolution DSP and oversampled systems.

Dr. Friedman has been with the Department of Electrical and Computer Engineering at the University of Rochester, Rochester, New York, since 1991, where he is a Distinguished Professor and Director of the High Performance VLSI/IC Design and Analysis Laboratory. He previously was the Director of the Center for Electronic Imaging Systems. He is also a Visiting Professor at the Technion - Israel Institute of Technology. He also directs the Technion Advanced Circuits Research Center (ACRC). His current research and teaching interests are in high performance synchronous digital and mixed-signal microelectronic design and analysis with application to high speed portable processors and low power wireless communications.

He has authored twelve book chapters and many papers in the fields of high speed and low power CMOS design techniques, interconnect and substrate noise, pipelining and retiming, three-dimensional integration, and the theory and application of power and synchronous clock distribution networks.

Dr. Friedman has also authored or edited sixteen books, including Clock Distribution Networks in VLSI Circuits and Systems (IEEE Press, 1995), High Performance Clock Distribution Networks (Kluwer Academic Publishers, 1997), Analog Design Issues in Digital VLSI Circuits and Systems (Kluwer Academic Publishers, 1997), Timing Optimization through Clock Skew Scheduling (Kluwer Academic Publishers, 2000 and 2009), On-Chip Inductance in High Speed Integrated Circuits (Kluwer Academic Publishers, 2001), Power Distribution Networks in High Speed Integrated Circuits (Kluwer Academic Publishers, 2004), Multi-Voltage CMOS Circuit Design (John Wiley & Sons Press, 2006), Power Distribution Networks with On-Chip Decoupling Capacitors (Springer Verlag, 2008 and 2011), Three-Dimensional Integrated Circuit Design (Morgan Kaufmann, 2009), and High Performance Integrated Circuit Design (McGraw-Hill Publishers, 2012).

Dr. Friedman is a Fellow of the IEEE, Chair of the steering committee for the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, a Regional Editor of the Journal of Circuits, Systems and Computers, a Member of the editorial board of the Analog Integrated Circuits and Signal Processing, Microelectronics Journal, Journal of Low Power Electronics, and Journal of VLSI Signal Processing, and a Member of the technical program committee of a number of conferences.

He has been Editor-In-Chief of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, a Distinguished Lecturer of the IEEE CAS Society, a Member of the editorial board of the Proceedings of the IEEE and IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, a member of the IEEE Circuits and Systems (CAS) Society Board of Governors, CAS liaison to the IEEE Solid-State Circuits Society (SSCS), Guest editor of several special journal issues, Chair of the VLSI Systems and Applications IEEE Circuits and Systems Society Technical Committee, Chair of the Electron Devices Chapter of the IEEE Rochester Section, and General/Program/Technical Co-Chair of the 1997 International Workshop on Clock Distribution Networks, 2000 IEEE Workshop on Signal Processing Systems, 2003 and 2004 IEEE International Workshop on System-on-Chip for Real-Time Applications, 2004 IEEE International Conference on Electronics, Circuits, and Systems, 2006 IEEE International Symposium on Circuits and Systems, and 2007 IEEE International Symposium on Networks on Chip (NoC).

Dr. Friedman is a Fulbright scholar and has been a recipient of the Howard Hughes Masters and Doctoral Fellowships, an IBM University Research Award, an NSF Research Initiation Award, a DoD Augmentation Award for Science and Engineering Research Training, the 1996 Outstanding Chapter Chairman for IEEE Rochester section award, a GRC Inventor Recognition Award, a University of Rochester College of Engineering Teaching Excellence Award, the University of Rochester Graduate Teaching Award, and the IEEE Circuits and Systems 2013 Charles A. Desoer Technical Achievement Award.

Eby G. Friedman 於1957年出生於新澤西州的澤西市。他於1979年獲得賴菲特學院（Lafayette College）電機工程學士學位，並於1981年和1989年分別在加州大學爾灣分校（University of California, Irvine）獲得碩士和博士學位，皆為電機工程領域。
他於1978年在荷蘭埃因霍溫的飛利浦燈泡工廠（Philips Gloeilampen Fabrieken）工作，專注於雙極性差分放大器的設計。從1979年到1983年，他在加州紐波特海灘的休斯飛機公司（Hughes Aircraft Company）工作，涉及定制集成電路設計、軟體相容的閘陣列設計、一維和二維設備建模、電路建模以及雙層金屬工藝開發。從1983年到1991年，他在加州卡爾斯巴德的休斯飛機公司工作，晉升為信號處理設計與測試部門經理，負責高性能 VLSI/VHSIC CMOS 和 BIMOS 數位及類比集成電路的設計與測試，支持設計和測試方法及 CAD 工具的開發，功能和參數測試，以及高性能和高解析度的 DSP 和過採樣系統的開發。

自1991年以來，Friedman 博士一直在紐約州羅徹斯特大學（University of Rochester）電機與計算機工程系任教，擔任傑出教授及高性能 VLSI/IC 設計與分析實驗室主任。他曾擔任電子影像系統中心的主任，並且是以色列理工學院（Technion - Israel Institute of Technology）的訪問教授。他還負責以色列理工學院先進電路研究中心（Technion Advanced Circuits Research Center, ACRC）。他目前的研究和教學興趣集中在高性能同步數位和混合信號微電子設計與分析，應用於高速便攜處理器和低功耗無線通信。

他已撰寫十二章書籍和多篇論文，涵蓋高速和低功耗 CMOS 設計技術、互連和基板噪聲、管線化和重新定時、三維集成以及功率和同步時鐘分配網絡的理論與應用。

Friedman 博士還編著或編輯了十六本書，包括《VLSI電路與系統中的時鐘分配網絡》（Clock Distribution Networks in VLSI Circuits and Systems, IEEE Press, 1995）、《高性能時鐘分配網絡》（High Performance Clock Distribution Networks, Kluwer Academic Publishers, 1997）、《數位 VLSI 電路與系統中的類比設計問題》（Analog Design Issues in Digital VLSI Circuits and Systems, Kluwer Academic Publishers, 1997）、《透過時鐘偏斜排程進行時序優化》（Timing Optimization through Clock Skew Scheduling, Kluwer Academic Publishers, 2000 和 2009）、《高速集成電路中的片上電感》（On-Chip Inductance in High Speed Integrated Circuits, Kluwer Academic Publishers, 2001）、《高速集成電路中的電源分配網絡》（Power Distribution Networks in High Speed Integrated Circuits, Kluwer Academic Publishers, 2004）、《多電壓 CMOS 電路設計》（Multi-Voltage CMOS Circuit Design, John Wiley & Sons Press, 2006）、《帶有片上去耦電容的電源分配網絡》（Power Distribution Networks with On-Chip Decoupling Capacitors, Springer Verlag, 2008 和 2011）、《三維集成電路設計》（Three-Dimensional Integrated Circuit Design, Morgan Kaufmann, 2009）以及《高性能集成電路設計》（High Performance Integrated Circuit Design, McGraw-Hill Publishers, 2012）。

Friedman 博士是 IEEE 會士，IEEE 超大規模集成（VLSI）系統期刊的指導委員會主席，《電路、系統與計算機期刊》的區域編輯，類比集成電路與信號處理、微電子期刊、低功耗電子期刊及 VLSI 信號處理期刊的編輯委員會成員，以及多個會議的技術程序委員會成員。

他曾擔任 IEEE 超大規模集成（VLSI）系統期刊的主編，IEEE CAS 社會的傑出講者，IEEE 會議論文集及 IEEE 電路與系統 II：類比與數位信號處理的編輯委員會成員，IEEE 電路與系統（CAS）社會理事會成員，CAS 與 IEEE 固態電路社會（SSCS）的聯絡人，數個特刊的客座編輯，IEEE 電路與系統社會 VLSI 系統與應用技術委員會主席，IEEE 羅徹斯特分會電子設備章的主席，以及1997年時鐘分配網絡國際研討會、2000年 IEEE 信號處理系統研討會、2003年和2004年 IEEE 實時應用系統單晶片國際研討會、2004年 IEEE 電子、電路與系統國際會議、2006年 IEEE 電路與系統國際研討會及2007年 IEEE 晶片網絡國際研討會的總主席/程序主席/技術主席。

Friedman 博士是富布萊特學者，曾獲得霍華德·休斯碩士及博士獎學金、IBM 大學研究獎、NSF 研究啟動獎、國防部科學與工程研究訓練增補獎、1996年 IEEE 羅徹斯特分會傑出章程主席獎、GRC 發明者認可獎、羅徹斯特大學工程學院教學卓越獎、羅徹斯特大學研究生教學獎，以及 IEEE 電路與系統 2013 年查爾斯·A·德索爾技術成就獎。