Top-Down Digital VLSI Design: From Architectures to Gate-Level Circuits and FPGAs (Paperback)

Hubert Kaeslin

  • 出版商: Morgan Kaufmann
  • 出版日期: 2014-12-04
  • 定價: $1,650
  • 售價: 9.8$1,617
  • 語言: 英文
  • 頁數: 598
  • 裝訂: Paperback
  • ISBN: 0128007303
  • ISBN-13: 9780128007303
  • 相關分類: FPGAVLSI
  • 立即出貨 (庫存=1)

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商品描述

Top-Down VLSI Design: From Architectures to Gate-Level Circuits and FPGAs represents a unique approach to learning digital design. Developed from more than 20 years teaching circuit design, Doctor Kaeslin’s approach follows the natural VLSI design flow and makes circuit design accessible for professionals with a background in systems engineering or digital signal processing. It begins with hardware architecture and promotes a system-level view, first considering the type of intended application and letting that guide your design choices.

Doctor Kaeslin presents modern considerations for handling circuit complexity, throughput, and energy efficiency while preserving functionality. The book focuses on application-specific integrated circuits (ASICs), which along with FPGAs are increasingly used to develop products with applications in telecommunications, IT security, biomedical, automotive, and computer vision industries. Topics include field-programmable logic, algorithms, verification, modeling hardware, synchronous clocking, and more.

  • Demonstrates a top-down approach to digital VLSI design.
  • Provides a systematic overview of architecture optimization techniques.
  • Features a chapter on field-programmable logic devices, their technologies and architectures.
  • Includes checklists, hints, and warnings for various design situations.
  • Emphasizes design flows that do not overlook important action items and which include alternative options when planning the development of microelectronic circuits.

商品描述(中文翻譯)

「從架構到閘級電路和可程式邏輯閘陣列的自上而下VLSI設計」代表了一種獨特的學習數位設計的方法。這本書是基於超過20年的電路設計教學經驗而開發的,Kaeslin博士的方法遵循自然的VLSI設計流程,使得具有系統工程或數位信號處理背景的專業人士能夠輕鬆進入電路設計領域。它從硬體架構開始,提倡系統級觀點,首先考慮預期應用的類型,並根據這一點來指導設計選擇。

Kaeslin博士介紹了處理電路複雜性、吞吐量和能源效率的現代考慮因素,同時保持功能性。本書重點介紹了應用特定集成電路(ASIC),這些電路與可程式邏輯閘陣列(FPGA)一起被越來越多地用於開發在電信、IT安全、生物醫學、汽車和計算機視覺等行業中應用的產品。主題包括可編程邏輯、算法、驗證、硬體建模、同步時鐘等。

本書的特點包括:
- 展示了一種自上而下的數位VLSI設計方法。
- 提供了架構優化技術的系統性概述。
- 包含一章關於可程式邏輯閘陣列設備、其技術和架構。
- 提供了各種設計情況的檢查清單、提示和警告。
- 強調設計流程不會忽視重要的行動項目,並在規劃微電子電路開發時提供替代選項。