A Practical Guide to Verilog-A: Mastering the Modeling Language for Analog Devices, Circuits and Systems (Paperback)

Discover how Verilog-A is particularly designed to describe behavior and connectivity of circuits and system components for analog SPICE-class simulators, or for continuous time (SPICE-based) kernels in Verilog-AMS simulators. With continuous updates since it's release 30 years ago, this practical guide provides a comprehensive foundation and understanding to the modeling language in its most recent standard formulation.
With the introduction of language extensions to support compact device modeling, the Verilog-A has become today de facto standard language in the electronics industry for coding compact models of active and passive semiconductor devices. You'll gain an in depth look at how analog circuit simulators work, solving system equations, modeling of components from other physical domains, and modeling the same physical circuits and systems at various levels of detail and at different levels of abstraction.

All industry standard compact models released by Si2 Compact Model Coalition (CMC) as well as compact models of emerging nano-electronics devices released by New Era Electronic Devices and Systems (NEEDS) initiative are coded in Verilog-A. This book prepares you for the current trends in the neuromorphic computing, hardware customization for artificial intelligence applications as well as circuit design for internet of things (IOT) will only increase the need for analog simulation modeling and make Verilog-A even more important as a multi-domain component-oriented modeling language.
Let A Practical Guide to Verilog-A be the initial step in learning the extended mixed-signal Verilog-AMS hardware description language.
What You'll Learn

• Review the hardware description and modeling language Verilog-A in its most recent standard formulation.
• Code new compact models of active and passive semiconductor devices as well as new models for emerging circuit components from different physical disciplines.
• Extend the application of SPICE-like circuit simulators to non-electronics field (neuromorphic, thermal, mechanical, etc systems).
• Apply the initial steps towards the extended mixed-signal Verilog-AMS hardware description language.

Who This Book Is For
Electronic circuit designers and SPICE simulation model developers in academia and industry. Developers of electronic design automation (EDA) tools. Engineers, scientists and students of various disciplines using SPICE-like simulators for research and development.

發現Verilog-A是專為模擬類比SPICE級聯模擬器或Verilog-AMS模擬器中的連接行為和電路系統元件而設計的。自從30年前發布以來，這本實用指南不斷更新，提供了對最新標準制定的建模語言的全面基礎和理解。

隨著引入支援緊湊設備建模的語言擴展，Verilog-A已成為電子行業中編寫主動和被動半導體器件緊湊模型的事實標準語言。您將深入了解類比電路模擬器的工作原理，解決系統方程，從其他物理領域建模元件，以及以不同細節和抽象層次建模相同的物理電路和系統。

所有由Si2 Compact Model Coalition（CMC）發布的行業標準緊湊模型以及由New Era Electronic Devices and Systems（NEEDS）計劃發布的新興納米電子器件的緊湊模型都是用Verilog-A編寫的。本書將使您為神經形態計算、人工智能應用的硬件定制以及物聯網（IOT）的電路設計等當前趨勢做好準備，這些趨勢只會增加對類比模擬建模的需求，使Verilog-A作為一種多域組件導向建模語言變得更加重要。

讓《Verilog-A實用指南》成為學習擴展混合信號Verilog-AMS硬件描述語言的第一步。

您將學到什麼：

- 回顧最新標準制定的硬件描述和建模語言Verilog-A。
- 編寫新的主動和被動半導體器件緊湊模型，以及來自不同物理學科的新型電路元件模型。
- 將類似SPICE的電路模擬器應用於非電子領域（神經形態、熱、機械等系統）。
- 開始應用擴展的混合信號Verilog-AMS硬件描述語言。

本書適合對電子電路設計和SPICE模擬模型開發感興趣的學術界和工業界的設計師。電子設計自動化（EDA）工具開發人員。使用類似SPICE的模擬器進行研究和開發的各個學科的工程師、科學家和學生。

Dr. Slobodan Mijalkovic is a Senior R&D Engineer at Silvaco, Inc., specialized in semiconductor device and integrated circuit modeling for electronic design automation (EDA) software tools. Before joining Silvaco Europe, he was a Principal Researcher in HiTeC Laboratory at Delft University of Technology in the Netherlands, where he led a team for standardization of the Mextram bipolar transistor model with Compact Model Coalition (CMC). Formerly, he was an Assistant and an Associate Professor with the Department of Microelectronics at Faculty of Electronics Engineering, University of Nis in Serbia (Yugoslavia).
Dr. Mijalkovic has authored 50 cited publications including the monograph "Multigrid Methods for Process Simulation" published by Springer. In the period 2002-2006 he has set and chaired four editions of "Compact Modeling for RF Application (CMRF)" workshops that strongly contributed to the acceptance of Verilog-A as a standard compact modeling language. He is a senior Member of IEEE and currently a member of the IEEE EDS Compact Modeling Committee.

Dr. Slobodan Mijalkovic是Silvaco公司的高級研發工程師，專門從事半導體器件和集成電路建模的電子設計自動化（EDA）軟體工具。在加入Silvaco Europe之前，他曾是荷蘭代爾夫特理工大學HiTeC實驗室的首席研究員，領導了一個團隊與Compact Model Coalition（CMC）合作進行Mextram雙極晶體管模型的標準化工作。此前，他曾在塞爾維亞尼什大學電子工程學院微電子系擔任助理教授和副教授。

Mijalkovic博士已經發表了50篇被引用的論文，其中包括由Springer出版的專著《用於過程模擬的多重網格方法》。在2002年至2006年期間，他主持舉辦了四屆“用於射頻應用的緊湊建模（CMRF）”研討會，這對於Verilog-A作為標準緊湊建模語言的接受起到了重要作用。他是IEEE的高級會員，目前是IEEE EDS緊湊建模委員會的成員。