商品描述
Focussing on micro- and nanoelectronics design and technology, this book provides thorough analysis and demonstration, starting from semiconductor devices to VLSI fabrication, designing (analog and digital), on-chip interconnect modeling culminating with emerging non-silicon/ nano devices. It gives detailed description of both theoretical as well as industry standard HSPICE, Verilog, Cadence simulation based real-time modeling approach with focus on fabrication of bulk and nano-devices. Each chapter of this proposed title starts with a brief introduction of the presented topic and ends with a summary indicating the futuristic aspect including practice questions. Aimed at researchers and senior undergraduate/graduate students in electrical and electronics engineering, microelectronics, nanoelectronics and nanotechnology, this book:
- Provides broad and comprehensive coverage from Microelectronics to Nanoelectronics including design in analog and digital electronics.
- Includes HDL, and VLSI design going into the nanoelectronics arena.
- Discusses devices, circuit analysis, design methodology, and real-time simulation based on industry standard HSPICE tool.
- Explores emerging devices such as FinFETs, Tunnel FETs (TFETs) and CNTFETs including their circuit co-designing.
- Covers real time illustration using industry standard Verilog, Cadence and Synopsys simulations.
商品描述(中文翻譯)
本書專注於微電子和奈米電子的設計與技術，提供從半導體元件到超大規模集成電路（VLSI）製造、模擬（類比和數位）、片上互連建模，最終探討新興的非矽/奈米元件的深入分析和示範。書中詳細描述了理論與業界標準的 HSPICE、Verilog、Cadence 模擬基於的實時建模方法，重點在於大宗和奈米元件的製造。每一章節都以簡要介紹所呈現的主題開始，並以總結結束，指出未來的發展方向，包括實踐問題。本書的目標讀者為電機與電子工程、微電子、奈米電子及奈米技術的研究人員及高年級本科生/研究生，內容包括：
- 提供從微電子到奈米電子的廣泛且全面的涵蓋，包括類比和數位電子的設計。
- 包含硬體描述語言（HDL）和超大規模集成電路（VLSI）設計，進入奈米電子領域。
- 討論元件、電路分析、設計方法論，以及基於業界標準 HSPICE 工具的實時模擬。
- 探索新興元件，如 FinFET、隧道場效應晶體管（TFET）和碳納米管場效應晶體管（CNTFET），包括其電路共同設計。
- 涵蓋使用業界標準的 Verilog、Cadence 和 Synopsys 模擬的實時示範。
作者簡介
Manoj Kumar Majumder received his PhD from Microelectronics and VLSI group at Indian Institute of Technology, Roorkee, India. Currently, he is working as assistant professor in Department of Electronics and Communication Engineering, IIIT Naya Raipur, Chhattisgarh. He has authored more than 25 papers in peer-reviewed international journals and more than 40 papers in international conferences. He has co-authored a book titled Carbon Nanotobe Based VLSI Interconnects-Analysis and Design (New York, NY, USA: Springer, 2014) and a book-chapter published by CRC Press. His current research interests include the area of graphene based Low power VLSI devices and circuits, On-chip VLSI interconnects and Through silicon vias. Dr. Majumder is associated with different academic and administrative activities of different positions in IIIT, Naya Raipur. He is an active member of IEEE, IEEE Electron Device Society and IEEE Circuits and Systems Society. He had delivered technical talks at different conferences in India and abroad. He is also an active reviewer of IEEE Transactions on electromagnetic Compatibility, IEEE Transactions on Nanotechnology, IEEE Electron Device Letters, Microelectronics Journal, IET Micro & Nano Letters, and other Springer Journals. He is a Member of many expert committees constituted by Government and Nongovernment organizations. He has also received many awards and recognitions from International Biographical Center, Cambridge, etc. His name has been listed in Marquis Who's Who in the World. Vijay Rao Kumbhare received the B.Tech degree in Electronics and Telecommunication Engineering from National Institute of Technology, Raipur, India in 2008, and M.Tech degree with specialization of Telecommunication System Engineering (TSE) under Electronics and Engineering Communication Department from Indian Institute of Technology, Kharagpur, West Bengal, India, in 2011. He had worked experience as assistant professor more than 5 years. He is currently working toward the Ph.D degree from Dr. Shyama Prasad Mukherjee International Institute of Information Technology Naya Raipur, India. He has attended several workshop and conferences, along with an active reviewer of reputed IET Biotechnology. His current research interest are in the area of Graphene nanoribbon, Carbon nanotube and optical based On-chip VLSI interconnects, emerging nano-materials. Aditya Japa received B.Tech. degree in Electronics and Communication Engineering from Sree Chaitanya College of Engineering, Karimnagar (J.N.T.U Hyderabad), Telangana, India, in 2012 and the M.Tech. degree in VLSI Design from Vignan's University, Andhra Pradesh, India, in 2015. He was a JRF under a DST project titled "Design, Analysis and Benchmarking of Energy efficient Hetero-junction tunnel FET based Digital, Analog and RF Building blocks during 2015-16. He is currently pursuing Ph.D. in Electronics and Communication Engineering from DSPM International Institute of Information Technology, Naya Raipur, India. His current research interest includes Hardware security subsystems like TRNG and PUF, emerging transistor technologies (Tunnel FETs), ultra-low power/energy efficient sensor readout circuits, VLSI design etc. Brajesh Kumar Kaushik received his Doctorate of Philosophy (Ph.D.) in 2007 from Indian Institute of Technology, Roorkee, India. He joined Department of Electronics and Communication Engineering, Indian Institute of technology, Roorkee, as Assistant Professor in December 2009; and since April 2014 he has been an Associate Professor. He has extensively published in several national and international journals and conferences. He is a reviewer of many international journals belonging to various publishers including IEEE, IET, Elsevier, Springer, Taylor & Francis, Emerald, ETRI, and PIER. He has served as General Chair, Technical Chair, and Keynote Speaker of many reputed international and national conferences. Dr. Kaushik is Senior Member of IEEE and member of many expert committees constituted by government and non-government organizations. He holds the position of Editor and Editor-in-Chief of various journals in the field of VLSI and microelectronics such as International Journal of VLSI Design & Communication Systems (VLSICS), AIRCC Publishing Corporation. He also holds the position of Editor of Microelectronics Journal (MEJ), Elsevier Inc.; Journal of Engineering, Design and Technology (JEDT), Emerald Group Publishing Limited; Journal of Electrical and Electronics Engineering Research (JEEER); and Academic Journals. He has received many awards and recognitions from the International Biographical Center (IBC), Cambridge. His name has been listed in Marquis Who's Who in Science and Engineering(R) and Marquis Who's Who in the World(R). Dr. Kaushik has been conferred with Distinguished Lecturer award of IEEE Electron Devices Society (EDS) to offer EDS Chapters with a list of quality lectures in his research domain.
作者簡介(中文翻譯)
Manoj Kumar Majumder 於印度羅爾基印度科技學院的微電子與 VLSI 團隊獲得博士學位。目前，他在查蒂斯加爾邦的 IIIT Naya Raipur 電子與通信工程系擔任助理教授。他在國際同行評審期刊上發表了超過 25 篇論文，並在國際會議上發表了超過 40 篇論文。他共同撰寫了一本名為《碳奈米管基 VLSI 互連 - 分析與設計》（美國紐約：Springer，2014）的書籍，以及一本由 CRC Press 出版的書章。他目前的研究興趣包括基於石墨烯的低功耗 VLSI 設備和電路、片上 VLSI 互連和通過矽通孔。Majumder 博士參與了 IIIT Naya Raipur 的各種學術和行政活動，擔任不同職位。他是 IEEE、IEEE 電子設備學會和 IEEE 電路與系統學會的活躍成員。他曾在印度及國外的多個會議上發表技術演講。他也是 IEEE 電磁相容性期刊、IEEE 奈米技術期刊、IEEE 電子設備快報、微電子期刊、IET 微型與奈米快報及其他 Springer 期刊的活躍審稿人。他是多個由政府和非政府組織組成的專家委員會的成員。他還獲得了來自劍橋國際傳記中心等多個獎項和榮譽。他的名字被列入《馬奎斯世界名人錄》。
Vijay Rao Kumbhare 於 2008 年獲得印度國立技術學院 Raipur 的電子與通信工程學士學位，並於 2011 年在印度西孟加拉邦的印度科技學院 Kharagpur 獲得電子與工程通信系的通信系統工程（TSE）碩士學位。他擁有超過 5 年的助理教授工作經驗。目前，他正在印度 Naya Raipur 的 Dr. Shyama Prasad Mukherjee 國際資訊技術學院攻讀博士學位。他參加了多個研討會和會議，並擔任著名的 IET 生物技術期刊的活躍審稿人。他目前的研究興趣包括石墨烯奈米帶、碳奈米管和基於光學的片上 VLSI 互連、新興奈米材料。
Aditya Japa 於 2012 年在印度卡里曼納的 Sree Chaitanya 工程學院（J.N.T.U 海得拉巴）獲得電子與通信工程的學士學位，並於 2015 年在印度安得拉邦的 Vignan 大學獲得 VLSI 設計的碩士學位。他曾在 2015-16 年間擔任一個名為「設計、分析和基準測試能效異質結隧道 FET 基數位、類比和 RF 建構塊」的 DST 項目的 JRF。目前，他正在印度 Naya Raipur 的電子與通信工程攻讀博士學位。他目前的研究興趣包括硬體安全子系統，如 TRNG 和 PUF、新興的晶體管技術（隧道 FET）、超低功耗/能效的傳感器讀取電路、VLSI 設計等。
Brajesh Kumar Kaushik 於 2007 年在印度羅爾基的印度科技學院獲得哲學博士（Ph.D.）學位。他於 2009 年 12 月加入印度科技學院羅爾基的電子與通信工程系擔任助理教授；自 2014 年 4 月起，他成為副教授。他在多個國內外期刊和會議上發表了大量論文。他是多個國際期刊的審稿人，這些期刊來自不同的出版商，包括 IEEE、IET、Elsevier、Springer、Taylor & Francis、Emerald、ETRI 和 PIER。他曾擔任多個著名國際和國內會議的總主席、技術主席和主題演講者。Kaushik 博士是 IEEE 的高級會員，並且是多個由政府和非政府組織組成的專家委員會的成員。他擔任多個 VLSI 和微電子領域期刊的編輯和主編，如《國際 VLSI 設計與通信系統期刊》（VLSICS）、AIRCC 出版公司。他還擔任《微電子期刊》（MEJ，Elsevier Inc.）、《工程、設計與技術期刊》（JEDT，Emerald Group Publishing Limited）、《電氣與電子工程研究期刊》（JEEER）和《學術期刊》的編輯。他獲得了來自劍橋國際傳記中心（IBC）的多個獎項和榮譽。他的名字被列入《馬奎斯科學與工程名人錄》（Marquis Who's Who in Science and Engineering(R)）和《馬奎斯世界名人錄》（Marquis Who's Who in the World(R)）。Kaushik 博士獲得了 IEEE 電子設備學會（EDS）頒發的傑出講者獎，以向 EDS 分會提供其研究領域的高品質講座。
