DRAM Circuit Design: Fundamental and High-Speed Topics (美國原版)
Brent Keeth, R. Jacob Baker, Brian Johnson, Feng Lin
- 出版商: Wiley
- 出版日期: 2007-11-01
- 售價: $5,500
- 貴賓價: 9.5 折 $5,225
- 語言: 英文
- 頁數: 440
- 裝訂: Hardcover
- ISBN: 0470184752
- ISBN-13: 9780470184752
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相關分類:
電子商務 E-commerce、電子學 Eletronics、電路學 Electric-circuits
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商品描述
Description
This easy-to-read tutorial focuses on the chip designer rather than the user. It covers the transistor-level design of DRAM building blocks, including architecture and the array, voltage regulators and pumps, and peripheral circuits.
This book presents both standard and high-speed implementations in a balanced approach to help IC designers prepare for the future. It includes details of delay-locked loops (DLLs), digital phase-locked loops (DPLLs), output circuit paths including transmission lines, terminations, and protocols.
A modern, comprehensive introduction to DRAM for students and practicing chip designers
Dynamic Random Access Memory (DRAM) technology has been one of the greatestdriving forces in the advancement of solid-state technology. With its ability to produce high product volumes and low pricing, it forces solid-state memory manufacturers to work aggressively to cut costs while maintaining, if not increasing, their market share. As a result, the state of the art continues to advance owing to the tremendous pressure to get more memory chips from each silicon wafer, primarily through process scaling and clever design.
From a team of engineers working in memory circuit design, DRAM Circuit Design gives students and practicing chip designers an easy-to-follow, yet thorough, introductory treatment of the subject. Focusing on the chip designer rather than the end user, this volume offers expanded, up-to-date coverage of DRAM circuit design by presenting both standard and high-speed implementations. Additionally, it explores a range of topics: the DRAM array, peripheral circuitry, global circuitry and considerations, voltage converters, synchronization in DRAMs, data path design, and power delivery. Additionally, this up-to-date and comprehensive book features topics in high-speed design and architecture and the ever-increasing speed requirements of memory circuits.
The only book that covers the breadth and scope of the subject under one cover, DRAM Circuit Design is an invaluable introduction for students in courses on memory circuit design or advanced digital courses in VLSI or CMOS circuit design. It also serves as an essential, one-stop resource for academics, researchers, and practicing engineers.
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商品描述(中文翻譯)
這本易於閱讀的教程專注於晶片設計師而非使用者。它涵蓋了DRAM建構模塊的晶體管級設計,包括架構和陣列、電壓調節器和泵浦,以及外圍電路。
本書以平衡的方式呈現了標準和高速實現,以幫助IC設計師為未來做好準備。它包括延遲鎖定迴路(DLLs)、數字鎖相迴路(DPLLs)、輸出電路路徑(包括傳輸線、終端和協議)的詳細信息。
這是一本現代、全面介紹DRAM的書籍,適合學生和實踐中的晶片設計師閱讀。
動態隨機存取記憶體(DRAM)技術一直是固態技術發展的重要推動力之一。由於其能夠生產大量產品並以低價銷售,它迫使固態記憶體製造商在保持甚至增加市場份額的同時積極降低成本。因此,由於迫切需要從每個矽晶圓獲得更多的記憶體晶片,主要通過工藝縮放和巧妙設計,技術水平不斷提高。
《DRAM電路設計》是一本由記憶體電路設計工程師團隊撰寫的書籍,為學生和實踐中的晶片設計師提供了易於理解但全面的入門教程。本書專注於晶片設計師而非最終用戶,通過呈現標準和高速實現,提供了擴展且最新的DRAM電路設計內容。此外,它還探討了一系列主題:DRAM陣列、外圍電路、全局電路和相關考慮、電壓轉換器、DRAM的同步、數據路徑設計和電源供應。此外,這本最新且全面的書籍還介紹了高速設計和架構以及記憶體電路日益增長的速度要求。
《DRAM電路設計》是唯一一本在一本書中涵蓋了這個主題的廣度和範圍,對於記憶體電路設計課程的學生或VLSI或CMOS電路設計的高級數位課程的學生來說,這是一本寶貴的入門書。它還是學術界、研究人員和實踐工程師的必備資源。