Testing of Digital Systems (Hardcover)

N. K. Jha, S. Gupta

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Summary

Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.

 

Table of Contents

1. Introduction; 2. Fault models; 3. Combinational logic and fault simulation; 4. Test generation for combinational circuits; 5. Sequential ATPG; 6. IDDQ testing; 7. Functional testing; 8. Delay fault testing; 9. CMOS testing; 10. Fault diagnosis; 11. Design for testability; 12. Built-in self-test; 13. Synthesis for testability; 14. Memory testing; 15. High-level test synthesis; 16. System-on-a-chip testing; Index.

商品描述(中文翻譯)

摘要

《數位系統測試》是迄今為止最全面且涵蓋範圍最廣的一本關於設備測試的書籍,涵蓋了半導體行業中最大的製造費用之一,每年超過400億美元。本書從基礎知識開始,作者們引導讀者進入自動測試模式生成、可測試設計和內建自測等數位電路測試的進階主題,並涵蓋了IDDQ測試、功能測試、延遲故障測試、記憶體測試和故障診斷等更高級的技術。本書詳細介紹了最新的技術,包括針對各種故障模型的測試生成、不同集成電路層次的測試技術討論,以及關於系統單晶片測試合成的章節。本書適用於學生和工程師,既是一本優秀的高級/研究生教材,也是一本寶貴的參考書。

目錄

1. 引言;2. 故障模型;3. 組合邏輯和故障模擬;4. 組合電路的測試生成;5. 順序ATPG;6. IDDQ測試;7. 功能測試;8. 延遲故障測試;9. CMOS測試;10. 故障診斷;11. 可測試設計;12. 內建自測;13. 可測試合成;14. 記憶體測試;15. 高層次測試合成;16. 系統單晶片測試;索引。