High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices (Hardcover)
暫譯: 高速數位系統設計:互連理論與設計實務手冊 (精裝版)
Stephen H. Hall, Garrett W. Hall, James A. McCall
- 出版商: Wiley
- 出版日期: 2000-09-08
- 定價: $5,800
- 售價: 8.5 折 $4,930
- 語言: 英文
- 頁數: 347
- 裝訂: Hardcover
- ISBN: 0471360902
- ISBN-13: 9780471360902
-
相關分類:
數位訊號處理 Dsp
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商品描述
A cutting-edge guide to the theory and practice of high-speed digital system design
An understanding of high-speed interconnect phenomena is essential for digital designers who must deal with the challenges posed by the ever-increasing operating speeds of today's microprocessors. This book provides a much-needed, practical guide to the state of the art of modern digital system design, combining easily accessible explanations with immensely useful problem-solving strategies. Written by three leading Intel engineers, High-Speed Digital System Design clarifies difficult and often neglected topics involving the effects of high frequencies on digital buses and presents a variety of proven techniques and application examples. Extensive appendices, formulas, modeling techniques as well as hundreds of figures are also provided.
Coverage includes:
* A thorough introduction to the digital aspects of basic transmission line theory
* Crosstalk and nonideal transmission line effects on signal quality and timings
* The impact of packages, vias, and connectors on signal integrity
* The effects of nonideal return current paths, high frequency power delivery, and simultaneous switching noise
* Explanations of how driving circuit characteristics affect the quality of the digital signal
* Digital timing analysis at the system level that incorporates high-speed signaling effects into timing budgets
* Methodologies for designing high-speed buses and handling the very large number of variables that affect interconnect performance
* Radiated emission problems and how to minimize system noise
* The practical aspects of making measurements in high-speed digital systems
商品描述(中文翻譯)
一部關於高速數位系統設計理論與實務的前沿指南
對於數位設計師來說,理解高速互連現象是必不可少的,因為他們必須應對當今微處理器日益增長的運行速度所帶來的挑戰。本書提供了一本急需的實用指南,涵蓋現代數位系統設計的最新技術,將易於理解的解釋與極具實用性的問題解決策略相結合。這本書由三位領先的英特爾工程師撰寫,清晰地闡明了涉及高頻對數位匯流排影響的困難且常被忽視的主題,並展示了各種經過驗證的技術和應用範例。此外,還提供了廣泛的附錄、公式、建模技術以及數百幅圖示。
內容涵蓋:
* 基本傳輸線理論的數位方面的徹底介紹
* 交叉干擾及非理想傳輸線對信號質量和時序的影響
* 封裝、通孔和連接器對信號完整性的影響
* 非理想回流電流路徑、高頻電力傳遞和同時開關噪聲的影響
* 驅動電路特性如何影響數位信號質量的解釋
* 在系統層級進行數位時序分析,將高速信號效應納入時序預算
* 設計高速匯流排的方法論,以及處理影響互連性能的眾多變數
* 輻射發射問題及如何最小化系統噪聲
* 在高速數位系統中進行測量的實務方面
