Nano-Interconnect Materials and Models for Next Generation Integrated Circuit Design
暫譯: 下一代集成電路設計的奈米互連材料與模型

Bhattacharya, Sandip, Ajayan, J., Herrera, Fernando Avila

  • 出版商: CRC
  • 出版日期: 2025-06-27
  • 售價: $2,340
  • 貴賓價: 9.5$2,223
  • 語言: 英文
  • 頁數: 212
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 1032363827
  • ISBN-13: 9781032363820
  • 尚未上市,無法訂購

相關主題

商品描述

Aggressive scaling of device and interconnect dimensions has resulted in many low-dimensional issues in the nanometer regime. This book deals with various new-generation interconnect materials and interconnect modeling, and highlights the significance of novel nano-interconnect materials for 3D integrated circuit design. It provides information about advanced nanomaterials like carbon nanotube (CNT) and graphene nanoribbon (GNR) for the realization of interconnects, interconnect models, and crosstalk noise analysis.

Features:

- Focuses on materials and nanomaterials utilization in next-generation interconnects based on carbon nanotubes (CNT) and graphene nanoribbons (GNR).

- Helps readers realize interconnects, interconnect models, and crosstalk noise analysis. - Describes hybrid CNT- and GNR-based interconnects.

- Presents the details of power supply voltage drop analysis in CNT and GNR interconnects.

- Overviews pertinent RF performance and stability analysis.

This book is aimed at graduate students and researchers in electrical and materials engineering, and nano-/microelectronics.

商品描述(中文翻譯)

積極擴展設備和互連尺寸導致了納米級範圍內許多低維度問題。本書探討了各種新一代互連材料和互連建模,並強調了新型納米互連材料在三維集成電路設計中的重要性。它提供了有關先進納米材料的信息,如碳納米管(CNT)和石墨烯納米帶(GNR),以實現互連、互連模型和串擾噪聲分析。

特色:

- 專注於基於碳納米管(CNT)和石墨烯納米帶(GNR)的下一代互連中材料和納米材料的應用。
- 幫助讀者實現互連、互連模型和串擾噪聲分析。
- 描述基於混合CNT和GNR的互連。
- 提供CNT和GNR互連中電源電壓降分析的詳細信息。
- 概述相關的射頻性能和穩定性分析。

本書旨在為電氣和材料工程以及納米/微電子學的研究生和研究人員提供參考。

作者簡介

Sandip Bhattacharya received his Ph.D. (Eng.) degree from the Indian Institute of Engineering Science and Technology (IIEST), India, in 2017. From October 2017 to December 2020, he worked as a postdoctoral researcher at the HiSIM research center, Hiroshima University, Japan. He is currently working as an Associate Professor and Head of the Department of Electronics and Communication Engineering at SR University, Warangal, Telangana, India. His current research interests are nano device and interconnect modeling.

J. Ajayan received his B.Tech. degree in Electronics and Communication Engineering from Kerala University in 2009, and M.Tech. and Ph.D. degrees in Electronics and Communication Engineering from Karunya University, Coimbatore, India, in 2012 and 2017, respectively. He is an Associate Professor in the Department of Electronics and Communication Engineering at SR University, Telangana, India. He has published more than 100 research articles in various journals and international conferences. He has published two books, more than ten book chapters, and has two patents. He is a reviewer of more than 30 journals for various publishers. He was the Guest Editor for several of the special issues. His areas of interest are microelectronics, semiconductor devices, nanotechnology, RF integrated circuits, and photovoltaics.

Fernando Avila Herrera has worked in the field of academic and semiconductor industry. He has involved with the modeling and characterization of semiconductor devices, especially MOSFETs. Further, he has experience in device reliability modeling, model parameter extraction, Verilog-A, TCAD, and EDA tools. He also has experience in HiSIM family models for parameter extraction and physics modeling and FPGA programming. He has collaborated with different groups for developing compact models.

作者簡介(中文翻譯)

Sandip Bhattacharya 於2017年獲得印度工程科學與技術學院(IIEST)的博士(工程)學位。從2017年10月到2020年12月,他在日本廣島大學的HiSIM研究中心擔任博士後研究員。目前,他是印度特倫甘納邦Warangal的SR大學電子與通信工程系的副教授及系主任。他目前的研究興趣為奈米裝置及互連建模。

J. Ajayan 於2009年獲得喀拉拉大學電子與通信工程的學士學位,並於2012年和2017年分別在印度Coimbatore的Karunya大學獲得電子與通信工程的碩士及博士學位。他是印度特倫甘納邦SR大學電子與通信工程系的副教授。他在各種期刊和國際會議上發表了超過100篇研究文章,並出版了兩本書和十多個書章,擁有兩項專利。他是超過30本期刊的審稿人,並曾擔任多個特刊的客座編輯。他的研究領域包括微電子學、半導體裝置、奈米技術、射頻集成電路及光伏技術。

Fernando Avila Herrera 在學術界和半導體產業領域工作過。他參與了半導體裝置的建模和特性分析,特別是MOSFET。他在裝置可靠性建模、模型參數提取、Verilog-A、TCAD和EDA工具方面也有經驗。他還擁有HiSIM系列模型的參數提取和物理建模及FPGA編程的經驗。他與不同團隊合作開發緊湊模型。