Computer Organization and Architecture Designing for Performance, 11/e (IE-Paperback)
暫譯: 計算機組織與架構：性能設計，第11版 (IE-平裝本)

Comprehensive coverage spans the entire computer design field Utilizes a top-down approachcomputer system, processor, control unit for clarity and ease of use. The objective is to present the material in a fashion that keeps new material in a clear context. Systems are viewed from both the architectural and organizational structure perspectives to help students gain a comprehensive overview of computer design. A unified treatment of I/O provides a full understanding of I/O functions and structures, including discussions of DMA, direct cache access, and external interfaces. A focus on multicore gives students a broad understanding of this technology, found in virtually all contemporary machines. A thorough discussion of instruction sets, including a new chapter on assembly language. Detailed use of specific examples throughout the book to illustrate concepts, including Intel x86, ARM embedded system architecture, and IBM z13 mainframe.Hands-on experience reinforces concepts from the text Homework problems, case studies, and additional student resources enhance their understanding of the material. Projects and other student exercises are richly supported with a variety of research, simulation, and assembly language projects that instructors can use to tailor a course plan. Over 20 interactive simulations illustrate computer architecture design issues, providing a powerful tool for understanding the complex design features of a modern computer system.Chapter updates keep the text current Several chapters and discussions have been revised for the 11th Edition, including:o New - A discussion of multichip modules (MCMs), has been added to Chapter 1.o Updated - Updated treatment of SPEC benchmarks in Chapter 2 covers the new SPEC CPU2017 benchmark suite.o New - A chapter on memory hierarchy expands on material that was in the cache memory chapter and adds expanded coverage of both the principle of locality and the memory hierarchy.o Revised - The cache memory chapter (Chapter 5) now includes expanded treatment of logical cache organization, including new figures, to improve overall clarity.o New - Coverage of content-addressable memory, write allocate, and no write allocate policies have been added to Chapter 5.o New - A section on the increasingly popular Embedded DRAM, or eDRAM, is included in Chapter 6.

New to This Edition

Chapter updates keep the text current Several chapters and discussions have been revised for the 11th Edition, including:o A discussion of multichip modules (MCMs) has been added to Chapter 1.o Updated treatment of SPEC benchmarks in Chapter 2 covers the new SPEC CPU2017 benchmark suite.o A chapter on memory hierarchy expands on material that was in the cache memory chapter and adds expanded coverage of both the principle of locality and the memory hierarchy.o The cache memory chapter (Chapter 5) now includes expanded treatment of logical cache organization, including new figures, to improve overall clarity.o Coverage of content-addressable memory, write allocate, and no write allocate policies have been added to Chapter 5.o A new section on the increasingly popular Embedded DRAM, or eDRAM, is included in Chapter 6.