Computer Organization and Architecture Designing for Performance, 11/e (IE-Paperback)

William Stallings

Computer Organization and Architecture Designing for Performance, 11/e (IE-Paperback)

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商品描述

Description

This print textbook is available for students to rent for their classes. The Pearson print rental program provides students with affordable access to learning materials, so they come to class ready to succeed.For graduate and undergraduate courses in computer science, computer engineering, and electrical engineering.Comprehensively covers processor and computer design fundamentalsComputer Organization and Architecture, 11th Edition is about the structure and function of computers. Its purpose is to present, as clearly and completely as possible, the nature and characteristics of modern-day computer systems. Written in a clear, concise, and engaging style, author William Stallings provides a thorough discussion of the fundamentals of computer organization and architecture and relates these to contemporary design issues. Subjects such as I/O functions and structures, RISC, and parallel processors are thoroughly explored alongside real-world examples that enhance the text and build student interest. Incorporating brand-new material and strengthened pedagogy, the 11th Edition keeps students up to date with recent innovations and improvements in the field of computer organization and architecture.

Features

Comprehensive coverage spans the entire computer design field Utilizes a top-down approachcomputer system, processor, control unit for clarity and ease of use. The objective is to present the material in a fashion that keeps new material in a clear context. Systems are viewed from both the architectural and organizational structure perspectives to help students gain a comprehensive overview of computer design. A unified treatment of I/O provides a full understanding of I/O functions and structures, including discussions of DMA, direct cache access, and external interfaces. A focus on multicore gives students a broad understanding of this technology, found in virtually all contemporary machines. A thorough discussion of instruction sets, including a new chapter on assembly language. Detailed use of specific examples throughout the book to illustrate concepts, including Intel x86, ARM embedded system architecture, and IBM z13 mainframe.Hands-on experience reinforces concepts from the text Homework problems, case studies, and additional student resources enhance their understanding of the material. Projects and other student exercises are richly supported with a variety of research, simulation, and assembly language projects that instructors can use to tailor a course plan. Over 20 interactive simulations illustrate computer architecture design issues, providing a powerful tool for understanding the complex design features of a modern computer system.Chapter updates keep the text current Several chapters and discussions have been revised for the 11th Edition, including:o New - A discussion of multichip modules (MCMs), has been added to Chapter 1.o Updated - Updated treatment of SPEC benchmarks in Chapter 2 covers the new SPEC CPU2017 benchmark suite.o New - A chapter on memory hierarchy expands on material that was in the cache memory chapter and adds expanded coverage of both the principle of locality and the memory hierarchy.o Revised - The cache memory chapter (Chapter 5) now includes expanded treatment of logical cache organization, including new figures, to improve overall clarity.o New - Coverage of content-addressable memory, write allocate, and no write allocate policies have been added to Chapter 5.o New - A section on the increasingly popular Embedded DRAM, or eDRAM, is included in Chapter 6.

New to This Edition

Chapter updates keep the text current Several chapters and discussions have been revised for the 11th Edition, including:o A discussion of multichip modules (MCMs) has been added to Chapter 1.o Updated treatment of SPEC benchmarks in Chapter 2 covers the new SPEC CPU2017 benchmark suite.o A chapter on memory hierarchy expands on material that was in the cache memory chapter and adds expanded coverage of both the principle of locality and the memory hierarchy.o The cache memory chapter (Chapter 5) now includes expanded treatment of logical cache organization, including new figures, to improve overall clarity.o Coverage of content-addressable memory, write allocate, and no write allocate policies have been added to Chapter 5.o A new section on the increasingly popular Embedded DRAM, or eDRAM, is included in Chapter 6.

 

商品描述(中文翻譯)

描述

這本印刷教科書可供學生租借使用。皮爾森印刷租借計劃為學生提供經濟實惠的學習資料，使他們準備好迎接成功。適用於計算機科學、計算機工程和電機工程的研究生和本科課程。全面涵蓋處理器和計算機設計基礎。《計算機組織與體系結構》第11版關於計算機的結構和功能。其目的是以盡可能清晰和完整的方式呈現現代計算機系統的性質和特點。作者威廉·斯特林斯以清晰、簡潔和引人入勝的風格，全面討論了計算機組織和體系結構的基礎知識，並將其與當代設計問題相關聯。該書詳細探討了I/O功能和結構、RISC和並行處理器等主題，並通過增強文本和建立學生興趣的實際案例進行了全面探索。第11版加入了全新的內容和強化的教學法，使學生能夠跟上計算機組織和體系結構領域的最新創新和改進。

特點

全面涵蓋整個計算機設計領域，採用自上而下的方法，即計算機系統、處理器、控制單元，以便清晰易懂。目標是以一種使新材料保持在清晰上下文中的方式呈現材料。從體系結構和組織結構的角度來看待系統，以幫助學生全面了解計算機設計。統一處理I/O，全面理解I/O功能和結構，包括DMA、直接高速緩存訪問和外部接口的討論。專注於多核技術，使學生對這項技術有廣泛的了解，這是幾乎所有現代機器中都存在的技術。詳細討論指令集，包括一個新的組合語言章節。書中使用具體的例子詳細說明概念，包括Intel x86、ARM嵌入式系統架構和IBM z13大型機。通過實踐經驗加強學生對文本的理解，作業問題、案例研究和其他學生資源增強他們對材料的理解。項目和其他學生練習得到豐富的支持，教師可以使用各種研究、模擬和組合語言項目來定制課程計劃。超過20個互動模擬展示了計算機體系結構設計問題，為理解現代計算機系統的複雜設計特性提供了強大的工具。章節更新使文本保持最新狀態。第11版對幾個章節和討論進行了修訂，包括：o 新增 - 在第1章中增加了對多芯片模塊（MCM）的討論。o 更新 - 在第2章中更新了對SPEC基準的處理，涵蓋了新的SPEC CPU2017基準套件。o 新增 - 在第5章中對內存層次結構進行了擴展，包括了原本在高速緩存記憶體章節中的材料，並增加了對局部性原則和內存層次結構的擴展覆蓋。o 修訂 - 高速緩存記憶體章節（第5章）現在包括了對邏輯高速緩存組織的擴展處理，包括新的圖片，以提高整體清晰度。o 新增 - 在第5章中增加了內容可寻址記憶體、寫分配和非寫分配策略的內容。o 新增 - 在第6章中包括了越來越受歡迎的嵌入式DRAM（eDRAM）的部分。

本版的新特點

章節更新使文本保持最新狀態。第11版對幾個章節和討論進行了修訂，包括：o 在第1章中增加了對多芯片模塊（MCMs）的討論。o 在第2章中更新了對SPEC基準的處理，涵蓋了新的SPEC CPU2017基準套件。

目錄大綱

Table of Contents

I. Introduction

1. Basic Concepts and Computer Evolution

2. Performance Concepts

II. The Computer System

3. A Top-Level View of Computer Function and Interconnection

4. The Memory Hierarchy: Locality and Performance

5. Cache Memory

6. Internal Memory

7. External Memory

8. Input/Output

9. Operating System Support

III. Arithmetic and Logic

10. Number Systems

11. Computer Arithmetic

12. Digital Logic

IV. Instruction Sets and Assembly Language

13. Instruction Sets: Characteristics and Functions

14. Instruction Sets: Addressing Modes and Formats

15. Assembly Language and Related Topics

V. The Central Processing Unit

16. Processor Structure and Function

17. Reduced Instruction Set Computers

18. Instruction-Level Parallelism and Superscalar Processors

19. Control Unit Operation and Microprogrammed Control

VI. Parallel Organization

20. Parallel Processing

21. Multicore Computers

目錄大綱(中文翻譯)

目錄

I. 簡介

1. 基本概念和電腦演進

2. 效能概念

II. 電腦系統

3. 電腦功能和互連的高層視圖

4. 記憶體階層：局部性和效能

5. 快取記憶體

6. 內部記憶體

7. 外部記憶體

8. 輸入/輸出

9. 作業系統支援

III. 算術和邏輯

10. 數字系統

11. 電腦算術

12. 數位邏輯

IV. 指令集和組合語言

13. 指令集：特性和功能

14. 指令集：位址模式和格式

15. 組合語言和相關主題

V. 中央處理單元

16. 處理器結構和功能

17. 精簡指令集電腦

18. 指令級平行處理和超純量處理器

19. 控制單元操作和微程控制

VI. 平行組織

20. 平行處理

21. 多核心電腦

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