Digital VLSI Systems Design: A Design Manual for Implementation of Projects on FPGAs and ASICs using Verilog (Hardcover)
暫譯: 數位 VLSI 系統設計:FPGA 和 ASIC 專案實現的設計手冊(硬皮書)
Seetharaman Ramachandran
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商品描述
Description
- Details, step-by-step, how to design VLSI systems using Verilog
- Provides hands-on experience on the popular industrial CAD tools
- Shows the way to design systems that are device, vendor and technology independent
- Offers thorough knowledge of cracking complex algorithms and mapping it on FPGA/ASIC
- Prepares students to suit industries and research labs from day one
Digital VLSI Systems Design is written for an advanced level course using Verilog and is meant for undergraduates, graduates and research scholars of Electrical, Electronics, Embedded Systems, Computer Engineering and interdisciplinary departments such as Bio Medical, Mechanical, Information Technology, Physics, etc. It serves as a reference design manual for practicing engineers and researchers as well. Diligent freelance readers and consultants may also start using this book with ease. The book presents new material and theory as well as synthesis of recent work with complete Project Designs using industry standard CAD tools and FPGA boards, enabling the serious readers to design VLSI Systems on their own. The reader is taken step by step through the design right from implementing a single digital gate to a massive design consuming well over 100,000 gates. The Verilog codes developed for these designs are universal and can work on any FPGA or ASIC and are technology independent. The book presents the development of novel algorithms and architectures for optimum realization of high tech. products. All the design codes developed in this book are Register Transfer Level (RTL) compliant and can be readily used or amended to suit new projects.
商品描述(中文翻譯)
**描述**
- 詳細說明如何使用 Verilog 設計 VLSI 系統的逐步過程
- 提供使用流行的工業 CAD 工具的實作經驗
- 展示設計與設備、供應商和技術無關的系統的方法
- 提供破解複雜算法並將其映射到 FPGA/ASIC 的深入知識
- 從第一天起就為學生準備適應產業和研究實驗室的能力
《數位 VLSI 系統設計》是為使用 Verilog 的高級課程而撰寫,適合電機、電子、嵌入式系統、計算機工程及生醫、機械、資訊科技、物理等跨學科系所的本科生、研究生和研究學者。這本書同時也作為實務工程師和研究人員的參考設計手冊。勤奮的自由職業讀者和顧問也可以輕鬆開始使用這本書。書中呈現了新材料和理論,以及最近工作的綜合,並使用行業標準的 CAD 工具和 FPGA 板進行完整的專案設計,使認真閱讀的讀者能夠獨立設計 VLSI 系統。讀者將逐步了解設計過程,從實現單一數位閘到一個超過 100,000 個閘的龐大設計。為這些設計開發的 Verilog 代碼是通用的,可以在任何 FPGA 或 ASIC 上運行,並且與技術無關。這本書展示了為高科技產品的最佳實現而開發的新算法和架構。本書中開發的所有設計代碼均符合寄存器傳輸級 (RTL) 標準,並可隨時使用或修改以適應新專案。