Architectures for Computer Vision: From Algorithm to Chip with Verilog (Hardcover)

Hong Jeong

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商品描述

This book provides comprehensive coverage of 3D vision systems, from vision models and state-of-the-art algorithms to their hardware architectures for implementation on DSPs, FPGA and ASIC chips, and GPUs. It aims to fill the gaps between computer vision algorithms and real-time digital circuit implementations, especially with Verilog HDL design. The organization of this book is vision and hardware module directed, based on Verilog vision modules, 3D vision modules, parallel vision architectures, and Verilog designs for the stereo matching system with various parallel architectures. It provides Verilog vision simulators, tailored to the design and testing of general vision chips. It bridges the differences between C/C++ and HDL to encompass both software realization and chip implementation; includes numerous examples that realize vision algorithms and general vision processing in HDL. It is unique in providing an organized and complete overview of how a real-time 3D vision system-on-chip can be designed. It focuses on the digital VLSI aspects and implementation of digital signal processing tasks on hardware platforms such as ASICs and FPGAs for 3D vision systems, which have not been comprehensively covered in one single book. It provides a timely view of the pervasive use of vision systems and the challenges of fusing information from different vision modules. The accompanying website includes software and HDL code packages to enhance further learning and develop advanced systems. A solution set and lecture slides are provided on the book's companion website. The book is aimed at graduate students and researchers in computer vision and embedded systems, as well as chip and FPGA designers. Senior undergraduate students specializing in VLSI design or computer vision will also find the book to be helpful in understanding advanced applications.

商品描述(中文翻譯)

本書全面介紹了3D視覺系統,從視覺模型和最先進的算法到在DSP、FPGA和ASIC芯片以及GPU上實現的硬件架構。它旨在填補計算機視覺算法和實時數字電路實現之間的差距,特別是使用Verilog HDL設計。本書的組織是以視覺和硬件模塊為導向,基於Verilog視覺模塊、3D視覺模塊、並行視覺架構和用於不同並行架構的立體匹配系統的Verilog設計。它提供了針對通用視覺芯片設計和測試的Verilog視覺模擬器。它彌合了C/C++和HDL之間的差異,涵蓋了軟件實現和芯片實現,並包含了許多在HDL中實現視覺算法和通用視覺處理的示例。本書獨特之處在於提供了關於如何設計實時3D視覺系統芯片的有組織和完整的概述。它專注於數字VLSI方面和在ASIC和FPGA等硬件平台上實現數字信號處理任務的3D視覺系統,這在一本書中尚未全面涵蓋。它提供了對視覺系統的普遍使用和從不同視覺模塊中融合信息的挑戰的及時觀點。附帶的網站包括軟件和HDL代碼包,以增強進一步學習和開發高級系統。書的附帶網站提供了解答和講義幻燈片。本書面向計算機視覺和嵌入式系統的研究生和研究人員,以及芯片和FPGA設計師。專攻VLSI設計或計算機視覺的高年級本科生也會發現本書對於理解高級應用程序很有幫助。