Multi-Gigahertz Nyquist Analog-To-Digital Converters: Architecture and Circuit Innovations in Deep-Scaled CMOS and Finfet Technologies

Ramkaj, Athanasios T., Pelgrom, Marcel J. M., Steyaert, Michiel S. J.

  • 出版商: Springer
  • 出版日期: 2024-01-14
  • 售價: $4,800
  • 貴賓價: 9.5$4,560
  • 語言: 英文
  • 頁數: 269
  • 裝訂: Quality Paper - also called trade paper
  • ISBN: 3031227115
  • ISBN-13: 9783031227110
  • 相關分類: CMOS
  • 海外代購書籍(需單獨結帳)

相關主題

商品描述

This book proposes innovative circuit, architecture, and system solutions in deep-scaled CMOS and FinFET technologies, which address the challenges in maximizing the accuracy*speed/power of multi-GHz sample rate and bandwidth Analog-to-Digital Converters (ADC)s. A new holistic approach is introduced that first identifies the major error sources of a converter' building blocks, and quantitatively analyzes their impact on the overall performance, establishing the fundamental circuit-imposed accuracy - speed - power limits. The analysis extends to the architecture level, by introducing a mathematical framework to estimate and compare the accuracy - speed - power limits of several ADC architectures and variants. To gain system-level insight, time-interleaving is covered in detail, and a framework is also introduced to compare key metrics of interleaver architectures quantitatively. The impact of technology is also considered by adding process effects from several deep-scaled CMOS technologies.

The validity of the introduced analytical approach and the feasibility of the proposed concepts are demonstrated by four silicon prototype Integrated Circuits (IC)s, realized in ultra-deep-scaled CMOS and FinFET technologies.

  • Introduces a new, holistic approach for the analysis and design of high-performance ADCs in deep-scaled CMOS technologies, from theoretical concepts to silicon bring-up and verification;
  • Describes novel methods and techniques to push the accuracy - speed - power boundaries of multi-GHz ADCs, analyzing core and peripheral circuits' trade-offs across the entire ADC chain;
  • Supports the introduced analysis and design concepts by four state-of-the-art silicon prototype ICs, implemented in 28nm bulk CMOS and 16nm FinFET technologies;
  • Provides a useful reference and a valuable tool for beginners as well as experienced ADC design engineers.

商品描述(中文翻譯)

本書提出了在深度縮放的CMOS和FinFET技術中,針對多GHz取樣率和帶寬的類比數位轉換器(ADC)所面臨的挑戰,所需的創新電路、架構和系統解決方案,旨在最大化準確度、速度和功率的平衡。書中引入了一種新的整體方法,首先識別轉換器建構塊的主要誤差來源,並定量分析其對整體性能的影響,確立基本的電路所限的準確度、速度和功率極限。該分析擴展到架構層面,通過引入數學框架來估算和比較幾種ADC架構及其變體的準確度、速度和功率極限。為了獲得系統層面的洞察,詳細介紹了時間交錯技術,並引入了一個框架來定量比較交錯器架構的關鍵指標。此外,還考慮了技術的影響,通過加入幾種深度縮放CMOS技術的製程效應。

所提出的分析方法的有效性和所提概念的可行性,通過四個在超深度縮放CMOS和FinFET技術中實現的矽原型集成電路(IC)得以證明。

- 引入了一種新的整體方法,用於深度縮放CMOS技術中高性能ADC的分析和設計,涵蓋從理論概念到矽片啟動和驗證的全過程;
- 描述了推動多GHz ADC的準確度、速度和功率邊界的新方法和技術,分析整個ADC鏈中核心和周邊電路的權衡;
- 通過四個最先進的矽原型IC來支持所提出的分析和設計概念,這些IC實現於28nm的散裝CMOS和16nm的FinFET技術;
- 為初學者和經驗豐富的ADC設計工程師提供了有用的參考和寶貴的工具。

作者簡介

Athanasios T. Ramkaj received the M.Sc. degree (cum laude) in electrical engineering (microelectronics) from TU Delft, Delft, The Netherlands, and the Ph.D. degree (summa cum laude) in electrical engineering from KU Leuven, Leuven, Belgium, in 2014 and 2021, respectively. Since June 2021, he has been with the Murmann Mixed-Signal Group, Stanford University, Stanford, CA USA, as a postdoctoral research fellow. In parallel, he is also a visiting researcher at Kilby Labs, Texas Instruments, Santa Clara, CA USA, investigating multi-GHz ultra-low jitter A/D solutions. From 2013 to 2014, he was an AMS research/design intern in the Central Research & Development Department of NXP Semiconductors, Eindhoven, The Netherlands, where he worked on GHz-range A/D converters for communication systems. In 2019, he was an AMS research/design intern with the High-Speed Data Converters group of Analog Devices Inc., Wilmington, MA USA, investigating highly integrated solutionsfor bandwidth extension of next generation RF A/D converters. His main research interests include high-speed/bandwidth high-resolution RF sampling A/D converters, high-speed analog/mixed-signal circuits for wireline and wireless systems, ultra-wideband receiver front ends, and ultra-low jitter clocking.

Dr. Ramkaj is the recipient of the 2021 Analog Devices Outstanding Student Designer Award, the 2019-2020 IEEE Solid-State Circuits Society Predoctoral Achievement Award, and the 2015 IEEE PRIME Golden Leaf Best Student Paper Award. He also serves as a reviewer for the IEEE JOURNAL OF SOLID-STATE CIRCUITS, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION SYSTEMS, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, and IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: EXPRESS BRIEFS.

Marcel J. M. Pelgrom received his M.Sc. and Ph.D. degrees from Twente University, Enschede, The Netherlands. In 1979 he joined Philips Research Laboratories, wherehis research has covered topics as Charge Coupled Devices, MOS matching properties, analog-to-digital conversion, digital image correlation, and various analog building block techniques. He has headed several project teams and was as a team leader for high-speed analog-to-digital conversion products responsible for many Integrated Circuits. His IEEE JOURNAL OF SOLID-STATE CIRCUITS paper on MOS transistor mismatch is the most cited paper of this Journal. From 1996 till 2003 he was a department head for mixed-signal electronics research. In 2003 and 2014 he spent a sabbatical in Stanford University, Stanford, CA, USA, where he was appointed a consulting professor. Till 2013 he was a member of the technical staff of NXP Semiconductors, Eindhoven, The Netherlands. Next to the various activities concerning industry-academic relations, he was involved as a research fellow in research on substrate noise, variability and advanced conversion techniques. Presently, he is an independent consultant.

Dr. Pelgrom is an honorary professor at the KU Leuven, Leuven, Belgium, and the 2017 recipient of the prestigious IEEE Gustav R. Kirchhoff award. He served twice as an IEEE Distinguished Lecturer, as associate editor for the IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, and has written over 40 publications, three books, seven book chapters, and holds 37 US patents. He is currently lecturing at Twente University, Enschede, The Netherlands, Delft University, Delft, The Netherlands, and for MEAD/EPFL, Lausanne, Switzerland.

Michiel S. J. Steyaert received the M.Sc. degree in electrical and mechanical engineering and the Ph.D. degree in electronics from KU Leuven, Leuven, Belgium, in 1983 and 1987, respectively. From 1983 to 1986, he received the IWNOL Fellowship from the Belgian National Foundation for Industrial Research, which allowed him to work as a Research Assistant with the Laboratory ESAT, KU Leuven. In 1987, he was responsible for several industrial projects in the field of analog micropower circuits with the Laboratory ESAT as an IWONL Project Researcher. In 1988, he was a Visiting Assistant Professor with the University of California at Los Angeles, Los Angeles, CA, USA. He was appointed by the National Fund of Scientific Research, Belgium, as a Research Associate in 1989, as a Senior Research Associate in 1992, and as a Research Director with the Laboratory ESAT, KU Leuven, in 1996. Between 1989 and 1996, he was also a part-time Associate Professor. He was the Chair of the Electrical Engineering Department from 2005 until 2012. He is currently a Full Professor with KU Leuven. He was also the Dean of the Faculty of Engineering until 2020. He authored or co-authored over 500 papers in international journals or proceedings and co-authored over 24 books. His current research interests are in high performance and high-frequency analog integrated circuits for telecommunication systems and analog signalprocessing.

Dr. Steyaert received the 1990 and the 2001 European Solid-State Circuits Conference Best Paper Award, the 1991 and the 2000 NFWO Alcatel-Bell-Telephone Award for innovative work in integrated circuits for telecommunications, the 1995 and the 1997 IEEE-ISSCC Evening Session Award, and the 1999 IEEE Circuit and Systems Society Guillemin-Cauer Award. He is the only European Researcher who received both the 50th Anniversary Top ISSCC Contributors Award in 2003 and the 60th Anniversary Top ISSCC Contributors Award in 2013, for his strong and sustained contributions.

Filip Tavernier obtained the M.Sc. degree in electrical engineering and the Ph.D. degree in engineering science from KU Leuven, Leuven, Belgium, in 2005 and 2011, respectively. From 2011 to 2014, he was a Senior Fellow in the Microelectronics Group at the European Organisation for Nuclear Research (CERN), Geneva, Switzerland. From 2014 to 2015, he was a Postdoctoral Researcher with the Department of Electrical Engineering ESAT-MICAS of KU Leuven. From 2015 until 2020, he was an Assistant Professor, and since 2020, he is an Associate Professor at KU Leuven within the same department. His main research interests are analog and mixed-signal integrated circuits for high-performance data converters, DC-DC converters, optical receivers, and cryogenic circuits.

Prof. Tavernier is a Treasurer of the IEEE SSCS Benelux Chapter, an SSCS European Webinar Coordinator, a member of the Technical Program Committee of the European Solid State Circuits Conference (ESSCIRC) and the Custom Integrated Circuits Conference (CICC), and a member of the International Solid-State Circuits Conference (ISSCC) Student Research Preview Committee. He also serves as an Associate Editor for the IEEE SOLID-STATE CIRCUIT LETTERS.

作者簡介(中文翻譯)

Athanasios T. Ramkaj於2014年和2021年分別在荷蘭代爾夫特科技大學獲得電機工程(微電子學)碩士學位(優等)和比利時魯汀大學獲得電機工程博士學位(最高榮譽)。自2021年6月以來,他在美國加州史丹福大學的Murmann混合信號小組擔任博士後研究員。同時,他也是德州儀器公司位於加州聖克拉拉的Kilby Labs的訪問研究員,研究多GHz超低抖動的A/D解決方案。2013年至2014年,他在荷蘭埃因霍溫的NXP半導體公司中央研究與開發部門擔任AMS研究/設計實習生,專注於通訊系統的GHz範圍A/D轉換器。2019年,他在美國麻薩諸塞州威明頓的Analog Devices Inc.的高速數據轉換器小組擔任AMS研究/設計實習生,研究下一代RF A/D轉換器的帶寬擴展高度集成解決方案。他的主要研究興趣包括高速/帶寬高解析度RF取樣A/D轉換器、高速模擬/混合信號電路、超寬帶接收器前端以及超低抖動時鐘。

Ramkaj博士獲得2021年Analog Devices傑出學生設計師獎、2019-2020年IEEE固態電路學會博士前成就獎以及2015年IEEE PRIME金葉最佳學生論文獎。他還擔任IEEE固態電路期刊、IEEE超大規模集成系統期刊、IEEE電路與系統I:常規論文期刊及IEEE電路與系統II:快速簡報期刊的審稿人。

Marcel J. M. Pelgrom於荷蘭恩斯赫德的特文特大學獲得碩士和博士學位。1979年,他加入飛利浦研究實驗室,研究範疇包括電荷耦合裝置、MOS匹配特性、模擬到數位轉換、數位影像相關性及各種模擬元件技術。他曾負責多個專案團隊,並作為高速模擬到數位轉換產品的團隊領導,負責多項集成電路。他在IEEE固態電路期刊上發表的有關MOS晶體管不匹配的論文是該期刊被引用最多的論文。1996年至2003年,他擔任混合信號電子研究部門的部門主管。2003年和2014年,他在美國加州史丹福大學度過了學術休假,並被任命為顧問教授。直到2013年,他仍是荷蘭埃因霍溫的NXP半導體公司的技術人員。除了與產業學術關係相關的各種活動外,他還作為研究員參與了基板噪聲、變異性和先進轉換技術的研究。目前,他是一名獨立顧問。

Pelgrom博士是比利時魯汀大學的名譽教授,並於2017年獲得著名的IEEE Gustav R. Kirchhoff獎。他曾兩次擔任IEEE傑出講者,並擔任IEEE電路與系統I:常規論文期刊的副編輯,發表超過40篇論文、三本書、七個書章,並擁有37項美國專利。目前,他在荷蘭恩斯赫德的特文特大學、荷蘭代爾夫特大學以及瑞士洛桑的MEAD/EPFL授課。

Michiel S. J. Steyaert於1983年和1987年在比利時魯汀大學獲得電機與機械工程碩士學位及電子學博士學位。1983年至1986年,他獲得比利時國家工業研究基金會的IWNOL獎學金,得以在魯汀大學的ESAT實驗室擔任研究助理。1987年,他負責多個工業項目。