Digital Logic RTL & Verilog Interview Questions (Paperback)
暫譯: 數位邏輯 RTL 與 Verilog 面試問題 (平裝本)
Trey Johnson
- 出版商: CreateSpace Independ
- 出版日期: 2015-05-08
- 售價: $800
- 貴賓價: 9.8 折 $784
- 語言: 英文
- 頁數: 120
- 裝訂: Paperback
- ISBN: 1512021466
- ISBN-13: 9781512021462
-
相關分類:
職涯發展
立即出貨 (庫存 < 4)
買這商品的人也買了...
-
ARM SoC 體系結構 (ARM System-on-Chip Architecture, 2/e)$850$765 -
Writing Testbenches: Functional Verification of HDL Models, 2/e (Hardocver)$1,150$1,127 -
Verilog by Example: A Concise Introduction for FPGA Design (Paperback)$1,040$1,019 -
Systemverilog for Verification: A Guide to Learning the Testbench Language Features, 3/e (Hardcover)$3,980$3,781 -
Advanced Chip Design, Practical Examples in Verilog (Paperback)$1,800$1,764 -
CMOS 數位積體電路分析與設計, 4/e (Kang: CMOS Digital Integrated Circuits Analysis and Design, 4/e) (授權經銷版)$720$684 -
$148四則運算小計算器設計過程實錄 -- Verilog FPGA 數字系統設計入門學習日記 -
$1,134通信 IC設計 (套裝共2冊) -
為你自己學 Git$500$390 -
Signal and Power Integrity - Simplified, 3/e (Hardcover)$4,800$4,560 -
Digital Design: With an Introduction to the Verilog HDL, VHDL, and SystemVerilog, 6/e (GE-Paperback)$1,380$1,352 -
$301FPGA 原理和結構 -
數位影像處理 (Gonzalez & Woods : Digital Image Processing, 4/e)$880$862 -
心態致勝：全新成功心理學 (2019新版)$450$356 -
$528數字濾波器的 MATLAB 與 FPGA 實現 — Altera / Verilog 版, 2/e -
Practical UVM: Step by Step with IEEE 1800.2 (Paperback)$2,500$2,450 -
深度學習 -- 硬體設計$750$675 -
$245基於 Verilog HDL 的 FPGA 項目開發教程 -
你終究要學會 Linux -- Shell 指令完整使用精解$780$616 -
單晶片微電腦 8051/8951 原理與應用(C語言), 4/e (附多媒體光碟)$500$450 -
Perl 學習手冊, 8/e (Learning Perl: Making Easy Things Easy and Hard Things Possible, 8/e)$680$537 -
Verilog 高級數字系統設計技術與實例分析$654$621 -
SystemVerilog with RISC-V Processor Design (Paperback)$1,800$1,764 -
System Verilog 驗證：測試平臺編寫指南, 3/e (SystemVerilog for Verification: A Guide to Learning the Testbench Language Features, 3/e)$588$559 -
流暢的 Python｜清晰、簡潔、高效的程式設計, 2/e (Fluent Python: Clear, Concise, and Effective Programming, 2/e)$1,200$948
相關主題
商品描述
Are you ready for your job interview? This book is a perfect study guide for digital design engineers or college students who want to practice real digital logic and RTL questions. The questions were put together first hand by a professional engineer based upon his own job search with top tier semiconductor companies.
A wide range of information and topics are covered, including: RTL Verilog coding syntax, RTL Logic Design (including low power RTL design principles), clocking and reset circuits, clock domain crossing questions, digital design fundamentals, and logical thinking questions.
The book contains over 50 digital interview questions, 41 figures and drawings, and 28 practical Verilog code examples, and is a perfect tool to help you succeed on your interview.
By the end of this book, you will have the insight and knowledge of the types of digital design interview questions being asked in the field of semiconductor digital design today.
商品描述(中文翻譯)
您準備好面試了嗎？這本書是數位設計工程師或希望練習真實數位邏輯和 RTL 問題的大學生的完美學習指南。這些問題是由一位專業工程師根據他自己在頂尖半導體公司求職的經驗親自編寫的。
本書涵蓋了廣泛的信息和主題，包括：RTL Verilog 編碼語法、RTL 邏輯設計（包括低功耗 RTL 設計原則）、時鐘和重置電路、時鐘域交叉問題、數位設計基礎以及邏輯思維問題。
本書包含超過 50 道數位面試問題、41 幅圖形和繪圖，以及 28 個實用的 Verilog 代碼範例，是幫助您在面試中成功的完美工具。
在閱讀完本書後，您將對當前半導體數位設計領域中所提問的數位設計面試問題有深入的了解和知識。
